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Title: 1_061026140305 Download
  • Category:
  • VHDL-FPGA-Verilog
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  • File Size:
  • 200.48kb
  • Update:
  • 2008-10-13
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 Description: FPGA-based I2C bus simulation, using verilog HDL language.- Based on the FPGA I2C main line simulation, verilog uses the HDL language compilation.
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