magnitude Verilog HDL : For a vector (a, b), the r

Title: magnitude

Category:
VHDL-FPGA-Verilog
Tags:
[ASM] [源码]
File Size:
12.61kb
Update:
2008-10-13
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Uploaded by:
hjn1985

Description: Verilog HDL : For a vector magnitude (a, b), the magnitude representation is the following : A common approach to implementing thes e arithmetic functions is to use the Coordinate Rotation Digital Computer (CORDIC) algorithm. The CORDIC algorithm calculates the trigonome tric functions of sine, cosine, magn itude, and phase using an iterative process. It i 's made up of a series of micro-rotations of the v ector by a set of predetermined cons tants, which are powers of two. Using binary ar praxiology metic, this algorithm essentially replaces m ultipliers with shift and add operations. In a Stratix

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