Description: QuartusII prepared to use, based on the VHDL language button adder, from 0-11, also available via dial code switch control, from 11-0, joined the anti-tremor keyboard.
- [dds_ise7.1_su] - using Verilog language signal generator,
- [16latch] - Latch 16, the procedure adopted quartusI
- [clock] - Digital clock procedures, functional des
- [16X16LED] - 16* 16 lattice keil the original procedu
File list (Check if you may need any files):
Download