Description: DE2 development version of the default proceedings, verilog, inside of each module have been controlled and standardized procedures, it is worth learning
- [sram_verilog] - tell graphics Acquisition Verilog code i
- [DE2_TV] - an analog video input to VGA video outpu
- [DE2] - hard work for Dictyophora development. .
- [blank_project_0] - In nios II DE2 development board develop
- [Hello] - err
- [PictureBrowser.tar] - PictureBrowser is based on Altera
- [uart] - Open source serial communication procedu
- [sdram_0] - SDRAM procedures of the Verilog HDL for
- [DE2] - -Clk_Div,- Mode_Select,-Watch,-stop_watc
- [DE2_LCM_CCD] - DE2 video(part one)
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