Title:
a_block_with_several_functions_with_Verilog_HDL.ra
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Description: Verilog is the most widely used hardware description language.It can be used to the modeling, synthesis, and simulation stages of the hardware system design flow. With the scale of hardware design continually enlarging, describing the CPLD with HDL become the mainstream of designing ASIC and other IC.To comprehend Verilog HDL and get some knowledge of CPLD device, we design a block with several functions with Verilog HDL.
This thesis is about to discuss the above there aspects: Introduce the EPF10K 10 of Flex 10K series producted by Altera Corporation simply. the software Max+plusⅡ,Design the block with several functions with Verilog HDL.
- [Verilog(clock)] - Verilog language using an electronic bel
- [FPGA_AD] - Altera s FPGA-based development of FPGA-
File list (Check if you may need any files):
黄海平_多功能电子钟的Verilog设计
................................\黄海平_多功能电子钟的Verilog设计.doc
................................\黄海平_多功能电子钟的Verilog设计封面.doc
