Description: a generic synthesizable cordic with 2 modes: cascade and iterative. based on opencores.org version, a synthesizable testbench please refer to www.opencores.org for documentation
To Search:
- [CORDIC_mixer] - FPGA can be achieved, the use of the NCO
- [CORDIC] - CORDIC algorithm, contains all of the CO
- [cordic] - FPGA realization of algorithm cordic
- [cf_fft_256_8] - This is a source code of 256 point fft a
File list (Check if you may need any files):
cordic
......\r2p_cordic.vhd
......\r2p_CordicPipe.vhd
......\r2p_core.vhd
......\r2p_corproc.vhd
......\r2p_post.vhd
......\r2p_pre.vhd
......\testbench.vhd
......\testbench_syn.vhd
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