studyFFTcore Call FPGA implementation of the IP co

Title: studyFFTcore

Category:
VHDL-FPGA-Verilog
Tags:
[Matlab] [源码]
File Size:
1.23mb
Update:
2012-11-26
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0 Times
Uploaded by:
bitfengyun

Description: Call FPGA implementation of the IP core FFT computation, in the Xilinx implementation of the vertex4sx55FPGA

Downloaders recently: [More information of uploader bitfengyun]

To Search: fft core studyFFTcore XILINX FPGA fft fft xilinx ip core fft core vhdl xilinx fft fpga implementation of fft ifft in fpga fft xilinx core

[1024_FFT] - 1024-point FFT fast Fourier transform, a
[fftinterface] - Xinhua Cup first prize works: audio sign
[16Point-FFT] - 16:00 FFT VHDL source code, The xFFT16 f
[VHDL_Core_for_1024_Point_Radix_4_FFT_Computation.] - This paper shows the development of a 10
[16bitFFTFPGA] - 16-bit fixed-point FFT-DSP implementatio
[16FFT] - FPGA 16FFT VERILOG
[fft_verilog] - FFT IP core
[design] - The verilog implementation of 8-point FF
[fft_hdl] - A 16-point FFT is completed with the bas
[256fft] - • 256 -point radix-8 FFT. • Fo

File list (Check if you may need any files):

study_FFTcore
.............\.lso
.............\core_fft64.asy
.............\core_fft64.ngc
.............\core_fft64.sym
.............\core_fft64.v
.............\core_fft64.veo
.............\core_fft64.vhd
.............\core_fft64.vho
.............\core_fft64.xco
.............\core_fft64_flist.txt
.............\core_fft64_readme.txt
.............\core_fft64_xfft_v4_1_xst_1.lso
.............\core_fft64_xfft_v4_1_xst_1_vhdl.prj
.............\core_fft64_xmdf.tcl
.............\fft64.asy
.............\fft64.ngc
.............\fft64.sym
.............\fft64.v
.............\fft64.veo
.............\fft64.vhd
.............\fft64.vho
.............\fft64.xco
.............\fft64_flist.txt
.............\fft64_readme.txt
.............\fft64_tbw.v
.............\fft64_tbw_v.fdo
.............\fft64_tbw_v.udo
.............\fft64_xfft_v4_1_xst_1.lso
.............\fft64_xfft_v4_1_xst_1_vhdl.prj
.............\fft64_xmdf.tcl
.............\fft_fun.cmd_log
.............\fft_fun.lso
.............\fft_fun.prj
.............\fft_fun.stx
.............\fft_fun.syr
.............\fft_fun.udo
.............\fft_fun.v
.............\fft_fun.xst
.............\fft_fun_summary.html
.............\fft_fun_tbw.v
.............\fft_fun_tbw_v.udo
.............\fft_im.dat
.............\fft_output_im.dat
.............\fft_output_re.dat
.............\fft_re.dat
.............\matlab
.............\......\fft_im.dat
.............\......\fft_re.dat
.............\......\main.asv
.............\......\main.m
.............\study_FFTcore.ise
.............\study_FFTcore.ise_ISE_Backup
.............\study_FFTcore.restore
.............\templates
.............\.........\coregen.xml
.............\tmp
.............\...\_cg
.............\transcript
.............\work
.............\....\fft64
.............\....\.....\verilog.asm
.............\....\.....\_primary.dat
.............\....\.....\_primary.vhd
.............\....\fft64_tbw_v
.............\....\...........\verilog.asm
.............\....\...........\_primary.dat
.............\....\...........\_primary.vhd
.............\....\fft_fun
.............\....\.......\verilog.asm
.............\....\.......\_primary.dat
.............\....\.......\_primary.vhd
.............\....\fft_fun_tbw_v
.............\....\.............\verilog.asm
.............\....\.............\_primary.dat
.............\....\.............\_primary.vhd
.............\....\glbl
.............\....\....\verilog.asm
.............\....\....\_primary.dat
.............\....\....\_primary.vhd
.............\....\_info
.............\xfft_v4_1_timing_calculator_core_fft64.vhd
.............\xfft_v4_1_timing_calculator_fft64.vhd
.............\xst
.............\...\projnav.tmp
.............\...\work
.............\...\....\hdllib.ref
.............\...\....\vlg6A
.............\...\....\.....\fft64.bin
.............\...\....\vlg78
.............\...\....\.....\fft__fun.bin
.............\_xmsgs
.............\......\xst.xmsgs

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