Description: This an EOS project GFP Framing structure, be able to fault-tolerant, can be configured byte domain
- [E1andV.35standarddescribes.Rar] - E1 and V.35 standard descriptions and E1
- [frame_decode_and_encode] - Verilog prepared with a series of frames
- [FPGA_GFP] - FPGA-based GFP (Generic Framing Protocol
- [ETHERNET] - With GMII interface and feature ARP prot
- [rece_7E] - HDLC control began to receive data to th
- [sdh] - SDH is a modern optical fiber communicat
- [CSY10C] - Fiber Optic CSY10C information and optic
- [FPGA_VHDL_code] - FPGA to learn very valuable information,
- [fjq5] - Multiplexing video information is to sli
File list (Check if you may need any files):
GFP
...\crc.v
...\crc16.v
...\crc32.rar
...\crc32.v
...\eos详细设计方案模板.doc
...\gfp_fifo.v
...\gfp_sdh.v
...\GFP详细设计方案模板.doc
...\idle.v
...\kongzhi.v
...\mac_control.v
...\pli.v
...\pli_fifo.v
...\raoma.v
...\scoreboard.v
...\scr.v
...\simulator.v
...\src
...\...\bln.v
...\...\control.v
...\...\crc_16.v
...\...\fcs.v
...\...\fifo
...\...\....\BLKMEMDP_V6_3.v
...\...\....\fifo.v
...\...\....\fifo_ram.v
...\...\....\tb
...\...\....\..\fifo_tb.v
...\...\fifo.v
...\...\fifo_ram.v
...\...\gfpup.v
...\...\gfp_adaptation
...\...\..............\BLKMEMDP_V6_3.v
...\...\..............\control.v
...\...\..............\control_v1.0.v
...\...\..............\crc_16.v
...\...\..............\fcs.v
...\...\..............\gfp_adatation.v
...\...\..............\out_adaptation.v
...\...\..............\pif.v
...\...\..............\pif_ram.v
...\...\..............\pli.v
...\...\..............\pli_ram.v
...\...\..............\tb
...\...\..............\..\control_tb.v
...\...\..............\..\crc_16_tb.v
...\...\..............\..\fsc_tb.v
...\...\..............\..\gfp_adatation_tb.v
...\...\..............\..\out_adaptation_tb.v
...\...\..............\..\pif_tb.v
...\...\gfp_adatation.v
...\...\j0.v
...\...\j0_rom.coe
...\...\j0_rom.mif
...\...\j0_rom.v
...\...\outsel.v
...\...\out_adaptation.v
...\...\out_ctrl.v
...\...\pif.v
...\...\pif_ram.v
...\...\pli.v
...\...\pli_ram.v
...\...\raoma.v
...\...\scoreboard.v
...\...\scrambler
...\...\.........\bln.v
...\...\.........\descrambl.v
...\...\.........\out_ctrl.v
...\...\.........\scrambler.v
...\...\.........\scrambl_tb.v
...\...\.........\scrm.v
...\...\.........\tb
...\...\.........\..\scrambl_tb.v
...\...\scrambler.v
...\...\scrm.v
...\...\sdhup
...\...\.....\BLKMEMDP_V6_2.v
...\...\.....\j0.v
...\...\.....\j0_rom.coe
...\...\.....\j0_rom.mif
...\...\.....\j0_rom.v
...\...\.....\outsel.v
...\...\.....\raoma.v
...\...\.....\sdhup.v
...\...\.....\tb
...\...\.....\..\sdhup_tb.v
...\...\sdhup.v
...\...\simulator.v
...\...\tb1.v
...\...\tc1.v
...\...\tc2.v
...\...\tc3.v
...\...\tc4.v
...\...\tc5.v
...\...\tc6.v
...\...\testbench
...\...\.........\model
...\...\.........\.....\scoreboard.v
...\...\.........\.....\simulator.v
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