Description: Accumulator 10, EDA, FPGA, DDS signal generator of the phase accumulator can be used.
- [DDS] - FPGA with 51 and realize the process of
- [reg_add] - Tease赻using VHDL迡sweet shallow cavity fl
- [dds] - dds reference signal generator procedure
- [leijiaqi] - ACC
- [X4] - Multiplication accumulator 4
- [Desktop] - DDS DDS from the phase accumulator, sine
- [leijia] - Binary accumulator: accumulation of mult
- [multiplier-accumulator(vhdl)] - With the VHDL language to describe the d
- [DDS1] - Direct digital frequency synthesizer (Di
- [DDS] - Design of Direct digital synthesis Signa
File list (Check if you may need any files):
sum_ten.acf