Description: UART asynchronous serial communication protocol source code, using VHDL language, and may have a complete test file
- [serial_VHDL] - FPGA for serial communication procedure
- [FPGA+DSS+UART] - Using FPGA to achieve arbitrary waveform
- [uart] - UART code written in VHDL, experience ca
- [rs232] - RS232 verilog design
- [I2C_Verilog] - I2C controller Verilog source code examp
- [UART_Download] - This is the FPGA a serial communication
- [verilog4] - Verilog hardware description language cl
- [uart(Verilog)] - RS232 verilog source code, if necessary
- [testbench] - IC verification, a rare book, talking ab
- [uart-vhdl-testbench] - simple uart vhdl behavioural model (pack
File list (Check if you may need any files):