Description: UART code written in VHDL, experience card features a very wide.
- [LCDdisplayexperiment.Rar] - Altera NIOS processor, using VHDL in QUA
- [UART_source] - VHDL source files prepared by the UART,
- [sin] - sin generator can produce sin in VHDL of
- [UART232] - The VHDL language code is a comprehensiv
- [uart] - VHDL languages realize UART protocol pro
- [uart] - VHDL prepared the design of serial async
- [UART] - Input clock 20M, the baud rate for 9600,
- [fft_test] - FFT prepared using VHDL code, it is wide
- [gh_uart_16550_080407] - Commonly used in FPGA development serial
- [UART] - Contain complete UART code, including se
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