Description: Realize this experiment, PS/2 interface with RS-232 data interface, PS/2 keyboard to press the button, through RS-232 automatic transmission to the host serial debug terminal (sscom32.exe) and data receiving display received characters. Serial debug terminal settings: 115200 baud rate, one stop bit, no parity bit.
- [autobaud] - serial communication procedures, adaptiv
- [rs232_send] - rs232 vhdl procedures implemented asynch
- [PS2_LCD] - 1, ps/2 keyboard input, through the led
- [RS232] - quatus II environment realize RS232 VHDL
- [crc_7GPGA] - Using FPGA to achieve CRC algorithm, onl
- [JDBCDemo] - jsp to write a picture Verification Code
- [MBeautyQQ_demo] - QQ classic skin interface for third-part
- [googthing123] - FPGA to do VGA communication details, I
- [fifo] - Using dual-port ram realize asynchronous
- [FPGA_DESIGNED] - Have master' s thesis, based on the F
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