Description: Use of FPGA technology to achieve the pulse-width test, based on VHDL, test error of clock cycles
To Search:
- [t0mesure] - C8051F040 T0 right/INT0 input signal pul
- [clmchong] - Single-chip pulse width measurement test
- [d02] - This procedure for pulse width measureme
- [cnt_high] - Realize the frequency of testing the use
- [freq_dev] - A complete signal test procedures, the v
- [etester] - FPGA to achieve such accuracy the freque
File list (Check if you may need any files):
Download