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VHDL-FPGA-Verilog
Title:
fir_Verilog
Download
Category:
VHDL-FPGA-Verilog
Tags:
[WORD]
File Size:
5kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
szpak
Description:
Verilog prepared using the procedure fir filter!
Downloaders recently:
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More information of uploader szpak
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File list
(Check if you may need any files):
fir滤波器的Verilog程序.doc
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