Description: Sequence detector can be used to detect one or a binary code consisting of pulse sequence signal, which in the field of digital communications in a wide range of applications. When the sequence detector row received a group of binary code, if this group of codes and detectors in the same pre-set code, then output 1, otherwise output 0. As a result of this test lies in the receipt of the correct code must be continuous, which requires detector must be remembered that the previous code and correct the correct sequence, until the continuous detection and received every preset number of correspond to the same code. In the detection process, any one of unequal status will be returned to the initial detection of a fresh start. With test procedures
- [lxh_xulijianceqi] - This is a sequence detector, can detect
- [s_machine] - right.vhd s_machine.vhd sequence generat
- [detecter] - This is the sequence detector. Have a se
- [chk] - This procedure implements a sequence det
- [colorspaceconversion] - For video compression coding of the RGB
- [fifo] - This process commonly used for the memor
- [32-bit_multiplier_model] - This procedure for 32-bit multiplier, fo
- [code] - The use of state machines to design a se
- [2] - Sequence detector design and simulation
- [0611013001] - VERILOG
File list (Check if you may need any files):
sequence_tp.v
suquence_inspector.v
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