- Category:
- SCM
- Tags:
-
[WORD]
- File Size:
- 58kb
- Update:
- 2012-11-26
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- 0 Times
- Uploaded by:
- tthrs
Description: Verlog HDL write a 32 square-wave generator, for example, is able to add 4-way, phase adjustable, adjustable frequency, adjustable duty cycle. See readme.doc. Here only provide a source module that contains the top-level sub-modules sgs32.v settings dds.v and pll module altp.v and waveform-driven document
- [VerilogHDL135Tutorials] - Easy and simple VerilogHDL programs to h
- [DDS1024] - DDS frequency adjustable must realize VH
- [pulse_generating] - VHDL language used to achieve a certain
- [sin_vhdl] - Controlled by a programmable device sign
- [DDS] - This is an arbitrary frequency sinusoida
- [255] - All-digital PLL Verilog source code, thr
- [wave_generator] - Square-wave generator, can be divided as
File list (Check if you may need any files):
sgs32
.....\altp.bsf
.....\altp.v
.....\altp_bb.v
.....\dds.v
.....\dds3.vwf
.....\readme.docx
.....\sgs32.qpf
.....\sgs32.v
.....\sgs32_readme.doc