dallas_one-wire dallas one wire to achieve the VHD

Title: dallas_one-wire

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Category:
VHDL-FPGA-Verilog
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File Size:
4kb
Update:
2012-11-26
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Uploaded by:
chenyi_ch

Description: dallas one wire to achieve the VHDL approach commonly used.

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File list (Check if you may need any files):

dallas_one-wire
...............\clk_divider.vhd
...............\CVS
...............\...\Entries
...............\...\Entries.Extra
...............\...\Entries.Extra.Old
...............\...\Entries.Old
...............\...\Repository
...............\...\Root
...............\...\Template
...............\DS1821_2.vhd
...............\one_wire.vhd

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