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VHDL-FPGA-Verilog
Title:
Sobel
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Category:
VHDL-FPGA-Verilog
Tags:
[PDF]
File Size:
321kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
citydremer
Description:
This is a realization by VHDL Sobel edge operator algorithm
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File list
(Check if you may need any files):
一种新型的实时图像处理机结构及Sobel电路设计.pdf
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