RS_204_188_decoder The use of Verilog coding RS co

Title: RS_204_188_decoder

Category:
VHDL-FPGA-Verilog
Tags:
[VHDL] [源码]
File Size:
14kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
milerved

Description: The use of Verilog coding RS completed the design, coding parameters for the importation of 188, the output 204

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[RSencoder(Verilog)] - RS coding using the source code in Veril
[rs] - RS coding, verilog prepared, can customi
[RS_5_3_CODEC] - Data blocks for fault-tolerant encoding
[CORDIC_ATAN] - Verilog language used to complete based
[FPGA_PCB] - High-speed FPGA-PCB design guidelines. W

File list (Check if you may need any files):

Filename Size Date
第23章 RS(204 188)译码器的设计
..............................\BM_KES.v
..............................\CheinSearch.v
..............................\ff_mul.v
..............................\forney.v
..............................\ROM_INV.mif
..............................\rom_inv.v
..............................\rom_power.mif
..............................\rom_power.v
..............................\RS(204 188)译码器说明.txt
..............................\rs_decoder.v
..............................\SyndromeCalc.v

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Filename	Size	Date
第23章 RS(204	188)译码器的设计
..............................\BM_KES.v
..............................\CheinSearch.v
..............................\ff_mul.v
..............................\forney.v
..............................\ROM_INV.mif
..............................\rom_inv.v
..............................\rom_power.mif
..............................\rom_power.v
..............................\RS(204	188)译码器说明.txt
..............................\rs_decoder.v
..............................\SyndromeCalc.v