Description: To achieve the smart fan control, including the mode selection. Shook his head. Timing functions.
To Search:
- [fengshan] - Use of PWM principle, the use of single-
- [FPGA] - FPGA training course, very detailed, sui
- [fengsan] - Smart fan design, the realization of fou
- [zinengfengshan] - Smart fan design, liquid crystal display
- [v01] - SONIX, FAN, ASM, SCH，Remote control
File list (Check if you may need any files):
dianfengshan
............\db
............\..\add_sub_flh.tdf
............\..\add_sub_hlh.tdf
............\..\add_sub_ilh.tdf
............\..\dingshi.cbx.xml
............\..\dingshi.cmp.rdb
............\..\dingshi.db_info
............\..\dingshi.eco.cdb
............\..\dingshi.hif
............\..\dingshi.map.hdb
............\..\dingshi.map.qmsg
............\..\dingshi.sld_design_entry.sci
............\..\dingshi.sld_design_entry_dsc.sci
............\..\dingshi.tis_db_list.ddb
............\..\fenpin.asm.qmsg
............\..\fenpin.asm_labs.ddb
............\..\fenpin.cbx.xml
............\..\fenpin.cmp.cdb
............\..\fenpin.cmp.hdb
............\..\fenpin.cmp.logdb
............\..\fenpin.cmp.rdb
............\..\fenpin.cmp.tdb
............\..\fenpin.cmp0.ddb
............\..\fenpin.dbp
............\..\fenpin.db_info
............\..\fenpin.eco.cdb
............\..\fenpin.fit.qmsg
............\..\fenpin.hier_info
............\..\fenpin.hif
............\..\fenpin.map.cdb
............\..\fenpin.map.hdb
............\..\fenpin.map.logdb
............\..\fenpin.map.qmsg
............\..\fenpin.pre_map.cdb
............\..\fenpin.pre_map.hdb
............\..\fenpin.psp
............\..\fenpin.pss
............\..\fenpin.rtlv.hdb
............\..\fenpin.rtlv_sg.cdb
............\..\fenpin.rtlv_sg_swap.cdb
............\..\fenpin.sgdiff.cdb
............\..\fenpin.sgdiff.hdb
............\..\fenpin.signalprobe.cdb
............\..\fenpin.sld_design_entry.sci
............\..\fenpin.sld_design_entry_dsc.sci
............\..\fenpin.syn_hier_info
............\..\fenpin.tan.qmsg
............\..\fenpin.tis_db_list.ddb
............\..\fenpin1.asm.qmsg
............\..\fenpin1.asm_labs.ddb
............\..\fenpin1.cbx.xml
............\..\fenpin1.cmp.cdb
............\..\fenpin1.cmp.hdb
............\..\fenpin1.cmp.logdb
............\..\fenpin1.cmp.rdb
............\..\fenpin1.cmp.tdb
............\..\fenpin1.cmp0.ddb
............\..\fenpin1.dbp
............\..\fenpin1.db_info
............\..\fenpin1.eco.cdb
............\..\fenpin1.eds_overflow
............\..\fenpin1.fit.qmsg
............\..\fenpin1.fnsim.cdb
............\..\fenpin1.fnsim.hdb
............\..\fenpin1.fnsim.qmsg
............\..\fenpin1.hier_info
............\..\fenpin1.hif
............\..\fenpin1.map.cdb
............\..\fenpin1.map.hdb
............\..\fenpin1.map.logdb
............\..\fenpin1.map.qmsg
............\..\fenpin1.pre_map.cdb
............\..\fenpin1.pre_map.hdb
............\..\fenpin1.psp
............\..\fenpin1.pss
............\..\fenpin1.rtlv.hdb
............\..\fenpin1.rtlv_sg.cdb
............\..\fenpin1.rtlv_sg_swap.cdb
............\..\fenpin1.sgdiff.cdb
............\..\fenpin1.sgdiff.hdb
............\..\fenpin1.signalprobe.cdb
............\..\fenpin1.sim.cvwf
............\..\fenpin1.sim.hdb
............\..\fenpin1.sim.qmsg
............\..\fenpin1.sim.rdb
............\..\fenpin1.simfam
............\..\fenpin1.sld_design_entry.sci
............\..\fenpin1.sld_design_entry_dsc.sci
............\..\fenpin1.syn_hier_info
............\..\fenpin1.tan.qmsg
............\..\fenpin1.tis_db_list.ddb
............\..\fenpin60.asm.qmsg
............\..\fenpin60.asm_labs.ddb
............\..\fenpin60.cbx.xml
............\..\fenpin60.cmp.cdb
............\..\fenpin60.cmp.hdb
............\..\fenpin60.cmp.logdb
............\..\fenpin60.cmp.rdb
............\..\fenpin60.cmp.tdb
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