Description: Verilog realization of a simple single-threaded CPU, the composition of computer-based bibliography, clear lines of thought, a test platform.
- [cpu] - RISC cpu, using Verilog prepared and det
- [RISC_Core.ZIP] - This is an 8-bit RISC CPU on the design
- [RiscCpu] - Verilog-RISC CPU code to achieve a simpl
- [RISC8.ZIP] - verilogRISC8 cpu CORE8-bit RISC CPU core
- [RISC_8] - Verified 8 RISC-CPU source code, verilog
- [cpu] - VHDL language is designed to be simple t
- [111.ver] - verilog code for CPU design by Mohammad
- [CPU] - MIPS like CPU using verilog
File list (Check if you may need any files):
hdl
...\Lynn32_ADDER.v
...\Lynn32_ALU_CLA.v
...\Lynn32_ALU_CLA4.v
...\Lynn32_ALU_CLA8.v
...\Lynn32_ALU_CLO.v
...\Lynn32_ALU_CLO8.v
...\Lynn32_ALU_SHIFT.v
...\Lynn32_I.v
...\Lynn32_INSTMEM.v
...\Lynn32_INST_ROM.v
...\Lynn32_I_ALU.v
...\Lynn32_I_CU.v
...\lynn32_i_tb_tb_.v
...\Lynn32_MUX2.v
...\Lynn32_PC.v
...\Lynn32_REG.v
...\Lynn_DATAMEM.v
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