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Title: hdlc Download
 Description: hdlc-bus vhdl sample code. Contains code and documentation.
 Downloaders recently: [More information of uploader rensijun]
  • [hdlc] - The project is based on the language ver
  • [hdlc_manual] - HDLC protocol is widely used in telecomm
  • [Bidirectional-Bus] - Bi-directional bus VHDL source code, has
  • [hdlc] - HDLC communication module to send receiv
  • [Random_Number_generator] - This code is used for creating a system
  • [VHDL_UART] - VHDL language UART serial interface chip
  • [HDLC_ARM] - HDLC debug source code, in the ARM7 on t
  • [HDLC] - HDLC frame receiver include file: design
  • [hdlc-code] - Hardware description language used to ac
  • [HDLC] - hdlc design, using verilog
File list (Check if you may need any files):
hdlc
....\CODE
....\....\LIBS
....\....\....\hdlc_components_pkg.vhd
....\....\....\PCK_CRC16_D8.vhd
....\....\MEM_PKG.VHD
....\....\RX
....\....\..\CORE
....\....\..\....\flag_detect.vhd
....\....\..\....\RxChannel.vhd
....\....\..\....\Rxcont.vhd
....\....\..\....\Zero_detect.vhd
....\....\..\SCRIPTS
....\....\..\.......\WAVE.DO
....\....\..\TB
....\....\..\..\Rx_tb.vhd
....\....\SPMEM.VHD
....\....\tools_pkg.vhd
....\....\TOP
....\....\...\core
....\....\...\....\hdlc.vhd
....\....\...\....\RxBuff.vhd
....\....\...\....\RxFCS.vhd
....\....\...\....\RxSync.vhd
....\....\...\....\TxBuff.vhd
....\....\...\....\TxFCS.vhd
....\....\...\....\TxSync.vhd
....\....\...\....\WB_IF.vhd
....\....\...\scripts
....\....\...\.......\model
....\....\...\.......\.....\build_hdlc_top.do
....\....\...\.......\.....\build_TxFCS_Buff.do
....\....\...\.......\.....\wave.do
....\....\...\.......\nc-sim
....\....\...\.......\......\build_hdlc_top.csh
....\....\...\.......\......\build_RxFCS_Buff.csh
....\....\...\.......\......\build_TxFCS_Buff.csh
....\....\...\.......\......\cds.lib
....\....\...\.......\......\hdl.var
....\....\...\tb
....\....\...\..\hdlc_tb.vhd
....\....\...\..\RxTop_tb.vhd
....\....\...\..\TxTop_tb.vhd
....\....\TX
....\....\..\core
....\....\..\....\flag_ins.vhd
....\....\..\....\TxChannel.vhd
....\....\..\....\TXcont.vhd
....\....\..\....\zero_ins.vhd
....\....\..\scripts
....\....\..\.......\wave.do
....\....\..\tb
....\....\..\..\tx_tb.vhd
....\DOCS
....\....\hdlc_features.txt
....\....\hdlc_project.pdf
....\....\hdlc_project.tex
....\....\HDLC_top.dia
....\ETC

    

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