Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: ofdm_quartus_v72 Download
 Description: OFDM Modulation and Demodulation using Verilog in Quartus
 Downloaders recently: [More information of uploader whynot]
  • [SimulinkOFDM] - OFDM simuink simulation can guide you ho
  • [ddr_sdram_controller_vhdl] - ddr_sdram controller vhdl code, which ad
  • [mit-ofdm-wifi] - MIT on the OFDM transceiver, WIFI transc
  • [smi_rw] - IEEE802.3 standards-based network commun
  • [matlab_quartus] - Matlab can easily import the data in wav
  • [OFDM] - Thesis (Singlechip category) Graduation
  • [16QAM] - 16-QAM modulation on the FPGA system to
  • [qam16] - QAM modulation for OFDM system
  • [xapp288] - This is the reference design file for XA
  • [Receiver] - The OFDM-based 802.11a baseband hardware
File list (Check if you may need any files):
ofdm_modulation_v72
...................\ofdm_modulation_v72
...................\...................\ofdm_demodulation
...................\...................\.................\scripts
...................\...................\.................\.......\ofdm_demod_msim.tcl
...................\...................\.................\.......\ofdm_demod_wave.do
...................\...................\.................\sim
...................\...................\.................\...\check_rtl_rx.m
...................\...................\.................\...\imag_input.txt
...................\...................\.................\...\real_input.txt
...................\...................\.................\source
...................\...................\.................\......\cp_mem
...................\...................\.................\......\......\cp_mem.vhd
...................\...................\.................\......\latency_fifo
...................\...................\.................\......\............\latency_fifo.cmp
...................\...................\.................\......\............\latency_fifo.vhd
...................\...................\.................\......\............\latency_fifo_gen.vhd
...................\...................\.................\......\............\latency_fifo_inst.vhd
...................\...................\.................\......\ram_counter.vhd
...................\...................\.................\......\ram_read.vhd
...................\...................\.................\......\ready_latency_converter.vhd
...................\...................\.................\......\rx_top.vhd
...................\...................\.................\synthesis
...................\...................\.................\.........\ofdm_demod.qpf
...................\...................\.................\.........\ofdm_demod.qsf
...................\...................\.................\.........\ofdm_demod.sdc
...................\...................\.................\tb
...................\...................\.................\..\rx_tb.vhd
...................\...................\ofdm_integration
...................\...................\................\scripts
...................\...................\................\.......\ofdm_integration_msim.tcl
...................\...................\................\.......\ofdm_integration_wave.do
...................\...................\................\sim
...................\...................\................\...\check_rtl_top.m
...................\...................\................\...\imag_input.txt
...................\...................\................\...\real_input.txt
...................\...................\................\source
...................\...................\................\......\ofdm_int.vhd
...................\...................\................\synthesis
...................\...................\................\.........\ofdm_integration.qpf
...................\...................\................\.........\ofdm_integration.qsf
...................\...................\................\.........\ofdm_integration.sdc
...................\...................\................\.........\setup.tcl
...................\...................\................\tb
...................\...................\................\..\imag_input.txt
...................\...................\................\..\ofdm_int_tb.vhd
...................\...................\................\..\real_input.txt
...................\...................\ofdm_modulation
...................\...................\...............\scripts
...................\...................\...............\.......\ofdm_mod_msim.tcl
...................\...................\...............\.......\ofdm_mod_wave.do
...................\...................\...............\sim
...................\...................\...............\...\check_rtl_tx.m
...................\...................\...............\source
...................\...................\...............\......\add_cyclic_p

CodeBus www.codebus.net