Description: The QUARYUS environment contains a UART to run the project, the actual success of the EP2C20Q240 Universal Serial debugging VHDL programs
File list (Check if you may need any files):
UART
....\db
....\..\altsyncram_84l1.tdf
....\..\altsyncram_m981.tdf
....\..\altsyncram_tti2.tdf
....\..\cmpr_4vh.tdf
....\..\cntr_4qi.tdf
....\..\cntr_5hj.tdf
....\..\cntr_6mf.tdf
....\..\cntr_9gi.tdf
....\..\cntr_jmk.tdf
....\..\cntr_tmh.tdf
....\..\decode_1oa.tdf
....\..\decode_aoi.tdf
....\..\mux_5kc.tdf
....\..\mux_llc.tdf
....\..\mux_sjb.tdf
....\..\shift_taps_t1m.tdf
....\..\UART_ctrl.asm.qmsg
....\..\UART_ctrl.asm_labs.ddb
....\..\UART_ctrl.cbx.xml
....\..\UART_ctrl.cmp.bpm
....\..\UART_ctrl.cmp.cdb
....\..\UART_ctrl.cmp.ecobp
....\..\UART_ctrl.cmp.hdb
....\..\UART_ctrl.cmp.logdb
....\..\UART_ctrl.cmp.rdb
....\..\UART_ctrl.cmp.tdb
....\..\UART_ctrl.cmp0.ddb
....\..\UART_ctrl.cmp_bb.cdb
....\..\UART_ctrl.cmp_bb.hdb
....\..\UART_ctrl.cmp_bb.logdb
....\..\UART_ctrl.cmp_bb.rcf
....\..\UART_ctrl.dbp
....\..\UART_ctrl.db_info
....\..\UART_ctrl.eco.cdb
....\..\UART_ctrl.eds_overflow
....\..\UART_ctrl.fit.qmsg
....\..\UART_ctrl.fnsim.hdb
....\..\UART_ctrl.fnsim.qmsg
....\..\UART_ctrl.hier_info
....\..\UART_ctrl.hif
....\..\UART_ctrl.map.bpm
....\..\UART_ctrl.map.cdb
....\..\UART_ctrl.map.ecobp
....\..\UART_ctrl.map.hdb
....\..\UART_ctrl.map.logdb
....\..\UART_ctrl.map.qmsg
....\..\UART_ctrl.map_bb.cdb
....\..\UART_ctrl.map_bb.hdb
....\..\UART_ctrl.map_bb.logdb
....\..\UART_ctrl.merge.qmsg
....\..\UART_ctrl.pre_map.cdb
....\..\UART_ctrl.pre_map.hdb
....\..\UART_ctrl.psp
....\..\UART_ctrl.pss
....\..\UART_ctrl.rtlv.hdb
....\..\UART_ctrl.rtlv_sg.cdb
....\..\UART_ctrl.rtlv_sg_swap.cdb
....\..\UART_ctrl.sgdiff.cdb
....\..\UART_ctrl.sgdiff.hdb
....\..\UART_ctrl.signalprobe.cdb
....\..\UART_ctrl.sim.cvwf
....\..\UART_ctrl.sim.hdb
....\..\UART_ctrl.sim.qmsg
....\..\UART_ctrl.sim.rdb
....\..\UART_ctrl.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.atm
....\..\UART_ctrl.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.logdb
....\..\UART_ctrl.sld_design_entry.sci
....\..\UART_ctrl.sld_design_entry_dsc.sci
....\..\UART_ctrl.syn_hier_info
....\..\UART_ctrl.tan.qmsg
....\..\UART_ctrl.uartc_68f2a1c7e26e1bc15bf6883737c5e81.map.atm
....\..\UART_ctrl.uartc_68f2a1c7e26e1bc15bf6883737c5e81.map.logdb
....\..\wed.wsf
....\frame_ctrl.bsf
....\frame_ctrl.vhd
....\frequency_div131072.bsf
....\frequency_div131072.vhd
....\frequency_div8.bsf
....\frequency_div8.vhd
....\receiver_unit.bsf
....\receiver_unit.v
....\transmitter_unit.bsf
....\transmitter_unit.v
....\UART_ctrl.asm.rpt
....\UART_ctrl.bdf
....\UART_ctrl.cdf
....\UART_ctrl.done
....\UART_ctrl.dpf
....\UART_ctrl.fit.rpt
....\UART_ctrl.fit.smsg
....\UART_ctrl.fit.summary
....\UART_ctrl.flow.rpt
....\UART_ctrl.jdi
....\UART_ctrl.map.rpt
....\UART_ctrl.map.summary
....\UART_ctrl.merge.rpt
....\UART_ctrl.pin
....\UART_ctrl.pof
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