Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: example5 Download
 Description: With 8 keys corresponding to eight figures show that the initial value of 0. By key1 to key8 can display 1 to 8 values.
 Downloaders recently: [More information of uploader panda0429]
 To Search:
  • [key_fun] - Software anti-shake button VHDL procedur
File list (Check if you may need any files): 
example5
........\db
........\key.asm.rpt
........\key.cdf
........\key.done
........\key.dpf
........\key.fit.rpt
........\key.fit.smsg
........\key.fit.summary
........\key.flow.rpt
........\key.map.rpt
........\key.map.summary
........\key.pin
........\key.pof
........\key.qpf
........\key.qsf
........\key.qws
........\key.stp
........\key.tan.rpt
........\key.tan.summary
........\key.vhd

CodeBus www.codebus.net