Description: A total of 52 files showing examples of shell scripting for Cadence NCSIM simulator, multiple single module+ testbench examples in verilog 1995/2001, a "Randomized Smoothing Networks" paper (doc)+ppt+verilog codes and test bench from my EE7700 Distributed Algorithms Project.
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File list (Check if you may need any files):
vani_tut
........\balancer.v
........\balancerAsynch.v
........\BF_control.v
........\block8Asynch.v
........\blockAsynch.files
........\blockRun
........\butterfly.files
........\butterfly16.v
........\butterfly16Asynch.v
........\butterfly32Asynch.v
........\butterfly8.v
........\butterfly8Asynch.v
........\butterflyAsynch.files
........\butterflyRun
........\cds.lib
........\COMBO_SHIFTER.v
........\cshark
........\fifos.tar
........\fsm1_good.v
........\fsm2_good1.v
........\fsm_ang_pos.v
........\fsm_ang_pos_params.v
........\hdl.var
........\LFSR2_32.v
........\Nbit_adder.v
........\Nbit_adder_tb.v
........\Randomized Smoothing Networks 2.ppt
........\README
........\RSN.doc
........\rsv.v
........\runButterfly
........\runButterflyAsynch
........\runLFSR
........\runScript
........\SHIFTER_SHIFTINOUT.v
........\tb_8wire.v
........\tb_8wire_block.v
........\tb_8wire_butterfly.orig.v
........\tb_8wire_butterfly.v
........\tb_balancer.v
........\tb_balancerAsynch.v
........\tb_butterfly16Asynch.v
........\tb_butterfly8.v
........\tb_butterfly8Asynch.v
........\tb_butterfly8Asynch2.v
........\T_BF_control.orig.v
........\T_BF_control.v
........\T_COMBO_SHIFTER.v
........\T_fsm2_good1.v
........\T_fsm_ang_pos.v
........\T_SHIFTER_SHIFTINOUT.v
........\xilinxCompile
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