Description: Prepared using verilog signal modulation and demodulation process, including ask, fsk, qpsk of fpga implementation
- [QPSK] - FPGA-based QPSK modulation and demodulat
- [qpsk] - Carrier synchronization signal coherent
- [QPSK] - QPSK modulation and demodulation of the
- [mapping] - Completion of the program from the QPSK
- [QPSKvhdl] - QPSK modulation and demodulation of the
- [16qam——modulation] - verilog modulation procedures 16qam prep
- [DSP--base--on-FPGA] - This a classic foreign materials, descri
File list (Check if you may need any files):
module_dem
..........\2ask
..........\....\2ask.ise
..........\....\2ask.ise_ISE_Backup
..........\....\ask2.v
..........\....\ask2_summary.html
..........\....\_xmsgs
..........\2askdem
..........\.......\2askdem.ise
..........\.......\2askdem.ise_ISE_Backup
..........\.......\2askdem.ntrc_log
..........\.......\2askdem_ise9migration.zip
..........\.......\er.v
..........\.......\er_summary.html
..........\.......\icon.arg
..........\.......\icon.edn
..........\.......\icon.ncf
..........\.......\icon.ngo
..........\.......\icon_xst_example.v
..........\.......\icon_xst_verilog_example.arg
..........\.......\ila.arg
..........\.......\ila.cdc
..........\.......\ila.edn
..........\.......\ila.ncf
..........\.......\ila.ngo
..........\.......\ila_xst_example.v
..........\.......\ila_xst_verilog_example.arg
..........\.......\test.v
..........\.......\testmodu.bgn
..........\.......\testmodu.bit
..........\.......\testmodu.bld
..........\.......\testmodu.cel
..........\.......\testmodu.cmd_log
..........\.......\testmodu.drc
..........\.......\testmodu.lfp
..........\.......\testmodu.lso
..........\.......\testmodu.ncd
..........\.......\testmodu.ngc
..........\.......\testmodu.ngd
..........\.......\testmodu.ngr
..........\.......\testmodu.pad
..........\.......\testmodu.par
..........\.......\testmodu.pcf
..........\.......\testmodu.prj
..........\.......\testmodu.stx
..........\.......\testmodu.syr
..........\.......\testmodu.twr
..........\.......\testmodu.twx
..........\.......\testmodu.ucf
..........\.......\testmodu.unroutes
..........\.......\testmodu.ut
..........\.......\testmodu.xpi
..........\.......\testmodu.xst
..........\.......\testmodu_guide.ncd
..........\.......\testmodu_map.map
..........\.......\testmodu_map.mrp
..........\.......\testmodu_map.ncd
..........\.......\testmodu_map.ngm
..........\.......\testmodu_pad.csv
..........\.......\testmodu_pad.txt
..........\.......\testmodu_prev_built.ngd
..........\.......\testmodu_summary.html
..........\.......\testmodu_summary.xml
..........\.......\testmodu_usage.xml
..........\.......\vio.arg
..........\.......\vio.cdc
..........\.......\vio.edn
..........\.......\vio.ncf
..........\.......\vio.ngo
..........\.......\vio_xst_example.v
..........\.......\vio_xst_verilog_example.arg
..........\.......\_ngo
..........\.......\....\icon.ngo
..........\.......\....\ila.ngo
..........\.......\....\netlist.lst
..........\.......\....\vio.ngo
..........\.......\_xmsgs
..........\.......\......\bitgen.xmsgs
..........\.......\......\map.xmsgs
..........\.......\......\ngdbuild.xmsgs
..........\.......\......\par.xmsgs
..........\.......\......\trce.xmsgs
..........\.......\......\xst.xmsgs
..........\2FSK
..........\....\2FSK.ise
..........\....\2FSK.ise_ISE_Backup
..........\....\isim
..........\....\....\work
..........\....\....\....\glbl
..........\....\....\....\....\glbl.h
..........\....\....\....\....\mingw
..........\....\....\....\....\.....\glbl.obj
..........\....\....\....\hdllib.ref
..........\....\....\....\hdpdeps.ref
..........\....\....\....\stimu
..........\....\....\....\.....\mingw
..........\....\....\....\.....\.....\stimu.obj
..........\....\....\....\.....\stimu.h
..........\....\....\....\.....\xsimstimu.cpp
..........\....\....\....\two__fsk
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