fracn09 Clock generation perl to vhdl oijoij - CodeBus

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VHDL-FPGA-Verilog

Title: fracn09

Category:
VHDL-FPGA-Verilog
Tags:
[Linux] [Perl] [源码]
File Size:
27kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
fadjunkmail

Description: Clock generation perl to vhdl oijoij

Downloaders recently: [More information of uploader fadjunkmail]

To Search:

[wave_gen_timing] - Clock generation in VHDL
[Clock_Gen] - a decimal clock generation

File list (Check if you may need any files):

fracn09.pl
readme.txt
run_modelsim09.do
run_simili09.tcl
tb_fracn09.vhd

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