File list (Check if you may need any files):
i2c
...\bench
...\.....\verilog
...\.....\.......\CVS
...\.....\.......\...\Entries
...\.....\.......\...\Repository
...\.....\.......\...\Root
...\.....\.......\i2c_slave_model.v
...\.....\.......\spi_slave_model.v
...\.....\.......\tst_bench_top.v
...\.....\.......\wb_master_model.v
...\doc
...\...\i2c_specs.pdf
...\...\src
...\...\...\I2C_specs.doc
...\rtl
...\...\verilog
...\...\.......\i2c_master_bit_ctrl.v
...\...\.......\i2c_master_byte_ctrl.v
...\...\.......\i2c_master_defines.v
...\...\.......\i2c_master_top.v
...\...\.......\timescale.v
...\...\vhdl
...\...\....\I2C.VHD
...\...\....\i2c_master_bit_ctrl.vhd
...\...\....\i2c_master_byte_ctrl.vhd
...\...\....\i2c_master_top.vhd
...\...\....\readme
...\...\....\tst_ds1621.vhd
...\software
...\........\include
...\........\.......\oc_i2c_master.h