Copy of santhosh_08307031-verilog adder multiplier
..................................................\addersubblock.v
..................................................\addersubblock.v.bak
..................................................\adder_input.txt
..................................................\adder_output.txt
..................................................\addpp.v.bak
..................................................\carryseladd.v
..................................................\carryseladd.v.bak
..................................................\multipliernbit.v
..................................................\multipliernbit.v.bak
..................................................\multiplier_input.txt
..................................................\multiplier_output.txt
..................................................\mux2to1UDP.v
..................................................\mux2to1UDP.v.bak
..................................................\ripleaddernbit.v
..................................................\ripleaddernbit.v.bak
..................................................\testbench-adder32bit.v
..................................................\testbench-adder32bit.v.bak
..................................................\testbench-multiplier.v
..................................................\testbench-multiplier.v.bak