Description: Vhdl language used arm core, compressed package code of 19 common core component of this arm, procedures, and application code should be noted that top-level entity. Used to open quartus2 simulation software.
- [usbdriver] - Basic programing method for USB driver,
- [core_arm.tar] - use of the VHDL standard ARM processor c
- [ARM_Core] - arm Verilog HDL core ip
- [ARM_core_VHDL] - document ARM_core_VHDL.rar Embedded arm
- [20060726214218307] - based CPLD CCD Acquisition System Design
- [Freq_counter] - the code on the FPGA using VHDL developm
- [fftinterface] - Xinhua Cup first prize works: audio sign
- [CPU] - Simple 16-bit CPU design of the VHDL cod
- [out] - Miller verilog language decoder output w
- [leon_cpu] - leon cpu construction
File list (Check if you may need any files):
alu_avr.vhd
AVRuCPackage.vhd
avr_core.vhd
bit_processor.vhd
CPUWaitGenerator.vhd
DataRAM.vhd
external_mux.vhd
io_adr_dec.vhd
io_reg_file.vhd
pm_fetch_dec.vhd
portx.vhd
PROM.VHD
RAMDataReg.vhd
reg_file.vhd
Service_Module.vhd
simple_timer.vhd
Timer_Counter.vhd
top_avr_core_sim.vhd
uart.vhd
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