syn_fifo A Verilog description of a synchronous FI - CodeBus

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VHDL-FPGA-Verilog

Title: syn_fifo

Category:
VHDL-FPGA-Verilog
Tags:
[VHDL] [源码]
File Size:
1kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
balloo84

Description: A Verilog description of a synchronous FIFO memory circuit

Downloaders recently: [More information of uploader balloo84]

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File list (Check if you may need any files):

syn_fifo.v

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