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VHDL-FPGA-Verilog
Title:
MATLAB_sg_IP
Download
Category:
VHDL-FPGA-Verilog
Tags:
[WORD]
File Size:
39kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
lxd3721
Description:
The use of MATLAB for System Generator for DSP to create IP
Downloaders recently:
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More information of uploader lxd3721
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File list
(Check if you may need any files):
使用MATLAB为System Generator for DSP创建IP.doc
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