EXampleofFPGA
.............\Chapter10 Sample
.............\................\eth_clockgen.v
.............\................\eth_cop.v
.............\................\eth_crc.v
.............\................\eth_defines.v
.............\................\eth_fifo.v
.............\................\eth_host.v
.............\................\eth_maccontrol.v
.............\................\eth_macstatus.v
.............\................\eth_memory.v
.............\................\eth_miim.v
.............\................\eth_outputcontrol.v
.............\................\eth_phy.v
.............\................\eth_phy_defines.v
.............\................\eth_random.v
.............\................\eth_receivecontrol.v
.............\................\eth_register.v
.............\................\eth_registers.v
.............\................\eth_rxaddrcheck.v
.............\................\eth_rxcounters.v
.............\................\eth_rxethmac.v
.............\................\eth_rxstatem.v
.............\................\eth_shiftreg.v
.............\................\eth_spram_256x32.v
.............\................\eth_top.v
.............\................\eth_transmitcontrol.v
.............\................\eth_txcounters.v
.............\................\eth_txethmac.v
.............\................\eth_txstatem.v
.............\................\eth_wishbone.v
.............\................\tb_cop.v
.............\................\tb_ethernet.v
.............\................\tb_ethernet_with_cop.v
.............\................\tb_eth_defines.v
.............\................\tb_eth_top.v
.............\................\timescale.v
.............\................\wb_bus_mon.v
.............\................\wb_master32.v
.............\................\wb_master_behavioral.v
.............\................\wb_model_defines.v
.............\................\wb_slave_behavioral.v
.............\................\使用说明.txt
.............\Chapter4 Sample
.............\...............\I2C
.............\...............\...\automake.log
.............\...............\...\coregen.log
.............\...............\...\coregen.prj
.............\...............\...\I2C.dhp
.............\...............\...\I2C.npl
.............\...............\...\i2c_master_bit_ctrl.cmd_log
.............\...............\...\i2c_master_bit_ctrl.lso
.............\...............\...\i2c_master_bit_ctrl.ngc
.............\...............\...\i2c_master_bit_ctrl.ngr
.............\...............\...\i2c_master_bit_ctrl.prj
.............\...............\...\i2c_master_bit_ctrl.stx
.............\...............\...\i2c_master_bit_ctrl.syr
.............\...............\...\i2c_master_bit_ctrl.v
.............\...............\...\i2c_master_bit_ctrl.v.bak
.............\...............\...\i2c_master_bit_ctrl_vhdl.prj
.............\...............\...\i2c_master_byte_ctrl.cmd_log
.............\...............\...\i2c_master_byte_ctrl.lso
.............\...............\...\i2c_master_byte_ctrl.ngc
.............\...............\...\i2c_master_byte_ctrl.ngr
.............\...............\...\i2c_master_byte_ctrl.prj
.............\...............\...\i2c_master_byte_ctrl.stx
.............\...............\...\i2c_master_byte_ctrl.syr
.............\...............\...\i2c_master_byte_ctrl.v
.............\...............\...\i2c_master_byte_ctrl.v.bak
.............\...............\...\i2c_master_byte_ctrl_vhdl.prj
.............\...............\...\i2c_master_defines.v
.............\...............\...\i2c_master_defines.v.bak
.............\...............\...\i2c_master_top.cmd_log
.............\...............\...\i2c_master_top.lso
.............\...............\...\i2c_master_top.ngc
.............\...............\...\i2c_master_top.ngr
.............\...............\...\i2c_master_top.prj
.............\...............\...\i2c_master_top.stx
.............\...............\...\i2c_master_top.syr
.............\...............\...\i2c_master_top.v
.............\...............\...\i2c_master_top.v.bak
.............\...............\...\i2c_master_top_vhdl.prj
.............\............