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Title: bxfsq Download
 Description: Achieved using VHDL code 0-40000 arbitrary frequency, the specific sub-frequency reference can be modified. Matlab written by a variety of waveforms of MIF file, and then the realization of a multi-FPGA Waveform Generator! (Usual curriculum design)
 Downloaders recently: [More information of uploader yuanzhou_zhou]
 To Search:
  • [dvdclk] - Frequency procedure, according to the ne
  • [div] - div dclk
File list (Check if you may need any files):
bxfsq
.....\bxfsq.asm.rpt
.....\bxfsq.bdf
.....\bxfsq.cdf
.....\bxfsq.done
.....\bxfsq.dpf
.....\bxfsq.fit.eqn
.....\bxfsq.fit.rpt
.....\bxfsq.fit.smsg
.....\bxfsq.fit.summary
.....\bxfsq.fld
.....\bxfsq.flow.rpt
.....\bxfsq.map.eqn
.....\bxfsq.map.rpt
.....\bxfsq.map.summary
.....\bxfsq.pin
.....\bxfsq.pof
.....\bxfsq.ppl
.....\bxfsq.qpf
.....\bxfsq.qsf
.....\bxfsq.qws
.....\bxfsq.sim.rpt
.....\bxfsq.sof
.....\bxfsq.tan.rpt
.....\bxfsq.tan.summary
.....\bxfsq.vwf
.....\bxfsq_assignment_defaults.qdf
.....\chpro31.bsf
.....\chpro31.vhd
.....\chpro31.vhd.bak
.....\CHUZHI.bsf
.....\chuzhi.vhd
.....\chuzhi.vhd.bak
.....\cmp_state.ini
.....\db
.....\..\add_sub_09h.tdf
.....\..\add_sub_19h.tdf
.....\..\add_sub_29h.tdf
.....\..\add_sub_4eh.tdf
.....\..\add_sub_4lh.tdf
.....\..\add_sub_9lh.tdf
.....\..\add_sub_cnh.tdf
.....\..\add_sub_ich.tdf
.....\..\add_sub_mch.tdf
.....\..\add_sub_sjh.tdf
.....\..\add_sub_soh.tdf
.....\..\add_sub_u8h.tdf
.....\..\altsyncram_42j.tdf
.....\..\altsyncram_g7u.tdf
.....\..\bxfsq.asm.qmsg
.....\..\bxfsq.cbx.xml
.....\..\bxfsq.cmp.cdb
.....\..\bxfsq.cmp.hdb
.....\..\bxfsq.cmp.logdb
.....\..\bxfsq.cmp.rdb
.....\..\bxfsq.cmp.tdb
.....\..\bxfsq.cmp0.ddb
.....\..\bxfsq.dbp
.....\..\bxfsq.db_info
.....\..\bxfsq.eco.cdb
.....\..\bxfsq.eds_overflow
.....\..\bxfsq.fit.qmsg
.....\..\bxfsq.hier_info
.....\..\bxfsq.hif
.....\..\bxfsq.map.cdb
.....\..\bxfsq.map.hdb
.....\..\bxfsq.map.logdb
.....\..\bxfsq.map.qmsg
.....\..\bxfsq.pre_map.cdb
.....\..\bxfsq.pre_map.hdb
.....\..\bxfsq.psp
.....\..\bxfsq.pss
.....\..\bxfsq.rtlv.hdb
.....\..\bxfsq.rtlv_sg.cdb
.....\..\bxfsq.rtlv_sg_swap.cdb
.....\..\bxfsq.sgdiff.cdb
.....\..\bxfsq.sgdiff.hdb
.....\..\bxfsq.sim.cvwf
.....\..\bxfsq.sim.hdb
.....\..\bxfsq.sim.qmsg
.....\..\bxfsq.sim.rdb
.....\..\bxfsq.sim.vwf
.....\..\bxfsq.sld_design_entry.sci
.....\..\bxfsq.sld_design_entry_dsc.sci
.....\..\bxfsq.syn_hier_info
.....\..\bxfsq.tan.qmsg
.....\..\bxfsq.tis_db_list.ddb
.....\..\bxfsq0.rtl.mif
.....\..\bxfsq_cmp.qrpt
.....\..\bxfsq_sim.qrpt
.....\..\prev_cmp_bxfsq.asm.qmsg
.....\..\prev_cmp_bxfsq.fit.qmsg
.....\..\prev_cmp_bxfsq.map.qmsg
.....\..\prev_cmp_bxfsq.qmsg
.....\..\prev_cmp_bxfsq.sim.qmsg
.....\..\prev_cmp_bxfsq.tan.qmsg
.....\..\wed.wsf
.....\..\wed.zsf
.....\DELTA.bsf
.....\DELTA.vhd
    

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