Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: dds Download
 Description: fpga using dds principle, have a sine wave
 Downloaders recently: [More information of uploader wangjian_119]
  • [ddssinegeneratorcode.Rar] - described dds direct digital frequency s
  • [DDSPLL] - FPGA-based new DDS PLL clock generator
  • [DDS_Power] - FPGA on the verilog language programming
  • [box] - VHDL language using FPGA-based waveform
  • [DDS] - DDS-based digital phase-shifting sinusoi
  • [NCO_based_rom] - Integrity of the ROM-based lookup table
  • [DDS] - A simple VHDL implementation of a DDS on
  • [FPGA-DDC] - FPGA-Based Direct Digital Frequency Synt
  • [sin] - QuartusII achieved in the sine wave gene
File list (Check if you may need any files):
dds
...\ADDER10.bsf
...\ADDER10.vhd
...\ADDER32.bsf
...\ADDER32.vhd
...\ADDER32.vhd.bak
...\data_roms.asm.rpt
...\data_roms.bsf
...\data_roms.done
...\data_roms.fit.rpt
...\data_roms.fit.smsg
...\data_roms.fit.summary
...\data_roms.flow.rpt
...\data_roms.jdi
...\data_roms.map.rpt
...\data_roms.map.summary
...\data_roms.pin
...\data_roms.pof
...\data_roms.qpf
...\data_roms.qsf
...\data_roms.sof
...\data_roms.tan.rpt
...\data_roms.tan.summary
...\data_roms.vhd
...\data_roms.vhd.bak
...\db
...\..\altsyncram_0572.tdf
...\..\altsyncram_4f51.tdf
...\..\altsyncram_bv62.tdf
...\..\altsyncram_nv51.tdf
...\..\altsyncram_pk51.tdf
...\..\data_roms.ace_cmp.cdb
...\..\data_roms.ace_cmp.hdb
...\..\data_roms.asm.qmsg
...\..\data_roms.cbx.xml
...\..\data_roms.cmp.cdb
...\..\data_roms.cmp.hdb
...\..\data_roms.cmp.kpt
...\..\data_roms.cmp.logdb
...\..\data_roms.cmp.rdb
...\..\data_roms.cmp.tdb
...\..\data_roms.cmp0.ddb
...\..\data_roms.db_info
...\..\data_roms.eco.cdb
...\..\data_roms.fit.qmsg
...\..\data_roms.hier_info
...\..\data_roms.hif
...\..\data_roms.map.cdb
...\..\data_roms.map.hdb
...\..\data_roms.map.logdb
...\..\data_roms.map.qmsg
...\..\data_roms.pre_map.cdb
...\..\data_roms.pre_map.hdb
...\..\data_roms.rpp.qmsg
...\..\data_roms.rtlv.hdb
...\..\data_roms.rtlv_sg.cdb
...\..\data_roms.rtlv_sg_swap.cdb
...\..\data_roms.sgate.rvd
...\..\data_roms.sgate_sm.rvd
...\..\data_roms.sgdiff.cdb
...\..\data_roms.sgdiff.hdb
...\..\data_roms.sld_design_entry.sci
...\..\data_roms.sld_design_entry_dsc.sci
...\..\data_roms.syn_hier_info
...\..\data_roms.tan.qmsg
...\..\data_roms.tis_db_list.ddb
...\..\prev_cmp_data_roms.asm.qmsg
...\..\prev_cmp_data_roms.fit.qmsg
...\..\prev_cmp_data_roms.map.qmsg
...\..\prev_cmp_data_roms.qmsg
...\..\prev_cmp_data_roms.tan.qmsg
...\dds.bdf
...\dds.vhd
...\dds.vhd.bak
...\DDS.vwf
...\incremental_db
...\..............\compiled_partitions
...\..............\...................\data_roms.root_partition.map.kpt
...\..............\README
...\REG10B.bsf
...\REG10B.vhd
...\REG32B.bsf
...\REG32B.vhd
...\serv_req_info.txt
...\sin.mif
    

CodeBus www.codebus.net