基于FPGA的PCI接口源代码及Testbench Verilog程序代码\rd1008\base_addr_chk.v
..................................................\......\config_mux.v
..................................................\......\glue.v
..................................................\......\pargen.v
..................................................\......\pci_top.v
..................................................\......\rd1008.pdf
..................................................\......\retry_count.v
..................................................\......\state_machine.v
..................................................\......\tstbench\bkend_daemon.v
..................................................\......\........\pci_clk_reset.v
..................................................\......\........\pci_stim.v
..................................................\......\........\pci_tb.v
..................................................\......\........\tasks.v
..................................................\基于FPGA的PCI接口源代码及Testbench Verilog程序代码\rd1008\base_addr_chk.v
..................................................\..................................................\......\config_mux.v
..................................................\..................................................\......\glue.v
..................................................\..................................................\......\pargen.v
..................................................\..................................................\......\pci_top.v
..................................................\..................................................\......\rd1008.pdf
..................................................\..................................................\......\retry_count.v
..................................................\..................................................\......\state_machine.v
..................................................\..................................................\......\tstbench\bkend_daemon.v
..................................................\..................................................\......\........\pci_clk_reset.v
..................................................\..................................................\......\........\pci_stim.v
..................................................\..................................................\......\........\pci_tb.v
..................................................\..................................................\......\........\tasks.v
..................................................\..................................................\使用说明请参看右侧注释====〉〉.txt
..................................................\..................................................\rd1008\tstbench
..................................................\rd1008\tstbench
..................................................\基于FPGA的PCI接口源代码及Testbench Verilog程序代码\rd1008
..................................................\rd1008
..................................................\基于FPGA的PCI接口源代码及Testbench Verilog程序代码
基于FPGA的PCI接口源代码及Testbench Verilog程序代码