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Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: vhdl Download
 Description: Including an 8-bit D flip-flop, a jk flip-flop, a 10-counter. Suitable for beginners and developers
  • [FIFO] - Asynchronous FIFO controller Verilog Des
  • [IN1-OUT5] - This contains a compressed窜入and procedur
  • [jk-ff] - j-k flip flop implementation in XCS200
  • [chap3] - The realization of a small four accumula
File list (Check if you may need any files):
dff_8.vhd
jkdff.vhd
counter10.vhd
    

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