Description: I use verilog language to design a FFT base 4,and use CORDIC arithmetic to achieve this. last , I test it, it looks very good
- [fftshixian] - OFDM system FFT of Verilog HDL language.
- [DME1] - fft that uses the cordic alghoritm---1
- [CORDIC] - Digital controlled oscillator (NCO, nume
- [cfft] - FPGA-based fast Fourier algorithm design
- [src] - The source code consist of fft block wit
- [radix4FFT] - 4FFT matlab
File list (Check if you may need any files):
rofactor.v
address.v
cfft4.v
cfft.v
div4limit.v
dual_port_ram.v
dual_port_ram_bb.v
mulfactor.v
p2r_cordic.v
P2r_Cordic_Pipe1.v
P2r_Cordic_Pipe2.v
P2r_Cordic_Pipe3.v
P2r_Cordic_Pipe4.v
P2r_Cordic_Pipe5.v
P2r_Cordic_Pipe6.v
P2r_Cordic_Pipe7.v
P2r_Cordic_Pipe8.v