Description: CPUname is a RISC processor, using the Princeton architecture, CPU and data memory, the communication between the use of Load/Store instruction implementation, data storage to a unified format, 32-bit word length, 32-bit fixed-length instructions, the address instruction format. Using a dedicated data path structure, four lines, is divided into fetching and decoding, take the number of operations, write-back four-step, with related specialty channels to address the data-related problems, and jump instructions use branch prediction techniques, so as not to affect the water.
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File list (Check if you may need any files):
cpudesheji\32位RISKCUP报告.docx
..........\ASSEMBLER\ASSEMBLER\ASSEMBLER.APS
..........\.........\.........\ASSEMBLER.clw
..........\.........\.........\ASSEMBLER.cpp
..........\.........\.........\ASSEMBLER.dsp
..........\.........\.........\ASSEMBLER.dsw
..........\.........\.........\ASSEMBLER.h
..........\.........\.........\ASSEMBLER.ncb
..........\.........\.........\ASSEMBLER.opt
..........\.........\.........\ASSEMBLER.plg
..........\.........\.........\ASSEMBLER.rc
..........\.........\.........\ASSEMBLERDlg.cpp
..........\.........\.........\ASSEMBLERDlg.h
..........\.........\.........\Debug\ASSEMBLER.exe
..........\.........\.........\.....\ASSEMBLER.ilk
..........\.........\.........\.....\ASSEMBLER.obj
..........\.........\.........\.....\ASSEMBLER.pdb
..........\.........\.........\.....\ASSEMBLER.res
..........\.........\.........\.....\ASSEMBLERDlg.obj
..........\.........\.........\.....\StdAfx.obj
..........\.........\.........\.....\vc60.idb
..........\.........\.........\.....\vc60.pdb
..........\.........\.........\.....\新建 文本文档.txt
..........\.........\.........\ReadMe.txt
..........\.........\.........\res\ASSEMBLER.ico
..........\.........\.........\...\ASSEMBLER.rc2
..........\.........\.........\resource.h
..........\.........\.........\StdAfx.cpp
..........\.........\.........\StdAfx.h
..........\CPU\复件 (4) CPU\adder.v
..........\...\............\ALU.v
..........\...\............\cmp_state.ini
..........\...\............\CPU.asm.rpt
..........\...\............\CPU.done
..........\...\............\CPU.fit.eqn
..........\...\............\CPU.fit.rpt
..........\...\............\CPU.fit.summary
..........\...\............\CPU.fld
..........\...\............\CPU.flow.rpt
..........\...\............\CPU.map.eqn
..........\...\............\CPU.map.rpt
..........\...\............\CPU.map.summary
..........\...\............\CPU.pin
..........\...\............\CPU.pof
..........\...\............\CPU.ppl
..........\...\............\CPU.qpf
..........\...\............\CPU.qsf
..........\...\............\CPU.qws
..........\...\............\CPU.sim.rpt
..........\...\............\CPU.sof
..........\...\............\CPU.tan.rpt
..........\...\............\CPU.tan.summary
..........\...\............\CPU.v
..........\...\............\CPU.vwf
..........\...\............\CPU_assignment_defaults.qdf
..........\...\............\db\add_sub_jsh.tdf
..........\...\............\..\add_sub_und.tdf
..........\...\............\..\add_sub_voh.tdf
..........\...\............\..\altsyncram_8s41.tdf
..........\...\............\..\altsyncram_an31.tdf
..........\...\............\..\altsyncram_b4q.tdf
..........\...\............\..\altsyncram_bd51.tdf
..........\...\............\..\altsyncram_co31.tdf
..........\...\............\..\altsyncram_f4q.tdf
..........\...\............\..\altsyncram_fn31.tdf
..........\...\............\..\altsyncram_ho31.tdf
..........\...\............\..\altsyncram_of31.tdf
..........\...\............\..\altsyncram_qg31.tdf
..........\...\............\..\altsyncram_tf31.tdf
..........\...\............\..\altsyncram_vg31.tdf
..........\...\............\..\cntr_0fc.tdf
..........\...\............\..\CPU.asm.qmsg
..........\...\............\..\CPU.asm_labs.ddb
..........\...\............\..\CPU.cbx.xml
..........\...\............\..\CPU.cdb.qmsg
..........\...\............\..\CPU.cmp.cdb
..........\...\............\..\CPU.cmp.hdb
..........\...\............\..\CPU.cmp.logdb
..........\...\............\..\CPU.cmp.rdb
..........\...\............\..\CPU.cmp.tdb
..........\...\............\..\CPU.cmp0.ddb
..........\...\............\..\CPU.db_info
..........\...\............\..\CPU.eco.cdb
..........\...\............\..\CPU.eds_overflow
..........\...\............\..\CPU.fit.qmsg
..........\...\............\..\CPU.hier_info
..........\...\............\..\CPU.hif
..........\...\............\..\CPU.map.cdb
..........\...\............\..\CPU.map.hdb
..........\...\............\..\CPU.map.logdb
..........\...\............\..\CPU.map.qmsg
..........\...\............\..\CPU.pre_map.cdb
..........\...\.....
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