Description: Verilog hardware description language(HDL)specializes in describing hardware in the way of software language, and complete circuit simulation available are introduced. This thesis include the design of square root machine which is based on the EasyFPGA030 ,as well as the details of the design process Verilog language use and achieve results.
- [uart_rx] - actel A3P250 fpga with VERILOG HDL Seria
- [sqrt] - Verilog hardware and written calculation
- [VHDLsqurt] - Use VHDL to achieve the principles of pr
- [sqrt] - Square root of the tree-type divider-typ
- [FPGA_ping_pong_compete] - Simulation-based ping-pong game EasyFPGA
File list (Check if you may need any files):
开平方器.docx