Description: FPGA-based design of digital electronic clock, the system program by the total frequency module, " the minutes and seconds" counter module, data selection module, timer module, dynamic scanning display and decoding module. Get a will " ," and " division" and " seconds" display on the human visual organ of the timing device. It' s time for the 24-hour period, indicating full scale as 23:59:59, and another school, the school hours and the whole hour, and through digital tube display driver circuit timing results.
File list (Check if you may need any files):
DigitalClock
............\产生1000hz时钟的分频程序.doc
............\产生1hz时钟的分频模块程序.doc
............\产生500hz时钟的分频程序.doc
............\分计数器模块程序.doc
............\数据选择模块程序.doc
............\时计数器模块程序.doc
............\秒计数器模块程序.doc
............\系统总程序图.doc
............\译码和动态显示模块程序.doc
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