Description: spacewire bus transceiver interface, the source code, VHDL, applicable to Xilinx, testing FPGA: XC3S1000FTG256-4C
- [embeddeddevelop] - embedded linux embedded system design-dr
- [SW_CODEC] - SpaceWire Codec Source Vhdl
- [fpga-dm9000a] - A project engineering, hardware contains
- [Rocket] - In design of large-scale access converge
File list (Check if you may need any files):
spw_IF code\fifo9x64.vhd
...........\impl_note.pdf
...........\spw_if.vhd
...........\spw_link_if.vhd
...........\spw_receiver_sync.vhd
...........\spw_state_machine.vhd
...........\spw_timer.vhd
...........\spw_transmitter.vhd
...........\sync_one_pulse.vhd
spw_IF code
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