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VHDL-FPGA-Verilog
Title:
zyg
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Category:
VHDL-FPGA-Verilog
Tags:
[Text]
File Size:
2kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
zyg634
Description:
用VHDL控制液晶显示。下面就发一个去年参加CPLD竞赛时编写的一个显示模块。当然,不具通用性,但其中的总控制台方法是原创的,我认为很好用。有空我会梳理出一个通用的流程图,以便广大网友交流学习。
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vhdl 12864
[
matrixkeyscan
] - 4* 4 matrix keyboard VHDL control statem
File list
(Check if you may need any files):
zyg\11.txt ...\新建 文本文档.txt zyg
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