Description: 32-bit shift register with latches, using verilog HDL language can be used for string and convert
To Search:
- [synchronous] - 1:10 string and conversion, including th
- [SHFRT4_1] - Four series in and out of shift register
File list (Check if you may need any files):
32位带锁存移位寄存器（verilog）.txt
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