FX2(SlaveFIFO) FX2+ Slave+ FIFO cy68013 a routine

Title: FX2(SlaveFIFO)

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Category:
SCM
Tags:
[C/C++] [源码]
File Size:
17kb
Update:
2012-11-26
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Uploaded by:
richardqing812

Description: FX2+ Slave+ FIFO cy68013 a routine

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To Search: slave FIFO fx2 fifo cy68013 FX2 FIFO SLAVE

[KeilC51v750a_Full] - Keil full version and bring change, but
[USB2.0_Slave_FIFO_Sync] - This a CY7C68013 (USB2.0 Chip) Configura
[FX2-Slave-FIFO] - This is based on the CY7C68013 chip, wor
[68013FIFOIN] - Verilog HDL prepared CY7C68013 SLAVE FIF
[usb] - Test procedures for the use of 68,013, i
[FX2_Slave_FIFO] - cy68013 from the FIFO mode of communicat
[USB2.0FPGAEXAMPLES] - comunication between USB and FPGA
[c22-trunk] - Silabs 8051f040 device project. Contains
[Slave_FIFO] - Cy7c68013 Slave fifo mode
[Bulksrc] - Prepared using keil, Cy68013 bulk endpoi

File list (Check if you may need any files):

FX2 Slave FIFO\build.bat
..............\dscr.a51
..............\fw.c
..............\FX2 xFIFO 8-bit Async Build ENV.pif
..............\readme.txt
..............\tcxmaster.c
..............\tcxmaster.hex
..............\tcxmaster.iic
..............\tcxmaster.lnp
..............\tcxmaster.Opt
..............\tcxmaster.plg
..............\tcxmaster.Uv2
FX2 Slave FIFO

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