Description: Based on Cyclone EP1C6240C8 of the ADS2807, DAC2902 testing procedures. ADC is mainly used to control the use of FPGA acquisition and DAC output, so as to achieve high-frequency signal processing functions. First, from ADC2807 data acquisition, and then sent to DAC2902 output. FPGA I lines using analog timing ADC2807 and DAC2902 to achieve. ADC sampling frequency control to provide, DAC output frequency control, output waveform control, ADC channel conversion, DAC channel conversion functions.
- [EP2C5_SCH] - Cyclone II development board EP2C5 exper
- [LCD] - vhdl classical source code-- LCD control
- [AD7865test1] - err
- [FPGA-based-DAC] - A DA converter implemented with fpga, wi
- [DAC5662] - Good things, read and write using VHDL w
- [Example] - Nanny Fpga Development Board of the Genu
- [EthernetUDP] - ethernet mac core.this is the etherenet
- [FPGA_Clk] - Based on Cyclone EP1C6240C8 FPGA' s c
- [DataAcquisitionCard] - usb2.0 high-speed data acquisition card
- [AD9854] - The AD9854 DDS-based peripheral circuit
File list (Check if you may need any files):
ADDA\ADDA.asm.rpt
....\ADDA.bsf
....\ADDA.done
....\ADDA.dpf
....\ADDA.fit.rpt
....\ADDA.fit.smsg
....\ADDA.fit.summary
....\ADDA.flow.rpt
....\ADDA.jdi
....\ADDA.map.rpt
....\ADDA.map.smsg
....\ADDA.map.summary
....\ADDA.pin
....\ADDA.pof
....\ADDA.qpf
....\ADDA.qsf
....\ADDA.qws
....\ADDA.sim.rpt
....\ADDA.sof
....\ADDA.tan.rpt
....\ADDA.tan.summary
....\ADDA_test.bsf
....\db\ADDA.asm.qmsg
....\..\ADDA.cbx.xml
....\..\ADDA.cmp.bpm
....\..\ADDA.cmp.cdb
....\..\ADDA.cmp.ecobp
....\..\ADDA.cmp.hdb
....\..\ADDA.cmp.kpt
....\..\ADDA.cmp.logdb
....\..\ADDA.cmp.rdb
....\..\ADDA.cmp.tdb
....\..\ADDA.cmp0.ddb
....\..\ADDA.cmp_merge.kpt
....\..\ADDA.db_info
....\..\ADDA.eco.cdb
....\..\ADDA.eds_overflow
....\..\ADDA.fit.qmsg
....\..\ADDA.fnsim.hdb
....\..\ADDA.fnsim.qmsg
....\..\ADDA.hier_info
....\..\ADDA.hif
....\..\ADDA.lpc.html
....\..\ADDA.lpc.rdb
....\..\ADDA.lpc.txt
....\..\ADDA.map.bpm
....\..\ADDA.map.cdb
....\..\ADDA.map.ecobp
....\..\ADDA.map.hdb
....\..\ADDA.map.kpt
....\..\ADDA.map.logdb
....\..\ADDA.map.qmsg
....\..\ADDA.map_bb.cdb
....\..\ADDA.map_bb.hdb
....\..\ADDA.map_bb.logdb
....\..\ADDA.pre_map.cdb
....\..\ADDA.pre_map.hdb
....\..\ADDA.rtlv.hdb
....\..\ADDA.rtlv_sg.cdb
....\..\ADDA.rtlv_sg_swap.cdb
....\..\ADDA.sgdiff.cdb
....\..\ADDA.sgdiff.hdb
....\..\ADDA.sim.cvwf
....\..\ADDA.sim.hdb
....\..\ADDA.sim.qmsg
....\..\ADDA.sim.rdb
....\..\ADDA.simfam
....\..\ADDA.sld_design_entry.sci
....\..\ADDA.sld_design_entry_dsc.sci
....\..\ADDA.smp_dump.txt
....\..\ADDA.syn_hier_info
....\..\ADDA.tan.qmsg
....\..\ADDA.tis_db_list.ddb
....\..\ADDA_global_asgn_op.abo
....\..\add_sub_1rh.tdf
....\..\add_sub_4rh.tdf
....\..\add_sub_5rh.tdf
....\..\add_sub_7rh.tdf
....\..\add_sub_8rh.tdf
....\..\add_sub_ish.tdf
....\..\add_sub_jsh.tdf
....\..\altsyncram_00p3.tdf
....\..\altsyncram_ato3.tdf
....\..\cmpr_j4c.tdf
....\..\cmpr_m4c.tdf
....\..\cmpr_n4c.tdf
....\..\cntr_a4i.tdf
....\..\cntr_b4i.tdf
....\..\cntr_cti.tdf
....\..\cntr_e4i.tdf
....\..\cntr_eqi.tdf
....\..\cntr_umi.tdf
....\..\decode_9jf.tdf
....\..\mux_6hc.tdf
....\..\mux_ngc.tdf
....\..\mux_ogc.tdf
....\..\mux_oic.tdf
....\..\prev_cmp_ADDA.asm.qmsg
....\..\prev_cmp_ADDA.fit.qmsg
....\..\prev_cmp_ADDA.map.qmsg
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