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Title: 61EDA_D736 Download
 Description: spi bus verilog code
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SPI协议Verilog HDL程序包\spi_op_core\spi.pdf
........................\...........\spi_clgen.v
........................\...........\spi_defines.v
........................\...........\spi_shift.v
........................\...........\spi_top.v
........................\...........\tb\spi_slave_model.v
........................\...........\..\tb_spi_top.v
........................\...........\..\wb_master_model.v
........................\...........\timescale.v
........................\使用说明请参看右侧注释====〉〉.txt
........................\spi_op_core\tb
........................\spi_op_core
SPI协议Verilog HDL程序包
    

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