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Title: EP2C20 Download
 Description: FPGA-based implementation Scanner has passed the test can be used
 Downloaders recently: [More information of uploader ddzxqer]
 To Search: EP2C20
  • [ModelSim_TestBench_VHDL] - ModelSim VHDL template TestBench
  • [vhdl_clock] - VHDL digital clock, the use of digital c
  • [osc] - Digital Oscilloscope The FPGA realizatio
  • [Elevator] - To achieve the function of the frequency
  • [Spectrum_Analyzer] - Simple digital oscilloscope, mainly rela
  • [AD9851] - AD9851 in the communication system, main
  • [dac] - 0 ~ 5 V digital voltage source adjustabl
  • [pn] - Compiled based on Xilinx' s ISE9.0 63
  • [Xil3S500E_revD_emac] - spartan 3e development board Ethernet co
  • [LoaderTools] - This source code is used for TS stream t
File list (Check if you may need any files):
目录四:扫频仪EP2C20\扫频仪.不稳定版.txt
....................\检查版:nios,路径D盘\CONTEST_NIOS_ADDPS2\.metadata\.lock
....................\.....................\...................\.........\.log
....................\.....................\...................\.........\.plugins\org.eclipse.cdt.core\.log
....................\.....................\...................\.........\........\................make.core\specs.c
....................\.....................\...................\.........\........\.........................\specs.cpp
....................\.....................\...................\.........\........\.....................ui\dialog_settings.xml
....................\.....................\...................\.........\........\.............ore.resources\.root\.indexes\history.version
....................\.....................\...................\.........\........\..........................\.....\........\properties.index
....................\.....................\...................\.........\........\..........................\.....\........\properties.version
....................\.....................\...................\.........\........\..........................\.....\2.tree
....................\.....................\...................\.........\........\..........................\.safetable\org.eclipse.core.resources
....................\.....................\...................\.........\........\..................untime\.settings\org.eclipse.cdt.debug.core.prefs
....................\.....................\...................\.........\........\........................\.........\org.eclipse.cdt.ui.prefs
....................\.....................\...................\.........\........\........................\.........\org.eclipse.core.resources.prefs
....................\.....................\...................\.........\........\........................\.........\org.eclipse.ui.ide.prefs
....................\.....................\...................\.........\........\........................\.........\org.eclipse.ui.prefs
....................\.....................\...................\.........\........\............ui.ide\dialog_settings.xml
....................\.....................\...................\.........\........\...............workbench\dialog_settings.xml
....................\.....................\...................\.........\........\........................\workbench.xml
....................\.....................\...................\.........\version.ini
....................\.....................\...................\.sopc_builder\filters.xml
....................\.....................\...................\.............\install.ptf
....................\.....................\...................\.............\install2.ptf
....................\.....................\...................\.............\preferences.xml
....................\.....................\...................\address_gen.v
....................\.....................\...................\altpll1.cmp
....................\.....................\...................\altpll1.ppf
....................\.....................\...................\altpll1_wave0.jpg
....................\.....................\...................\capture.v
....................\.....................\...................\change.bsf
....................\.....................\...................\change.vhd
....................\.....................\...................\change.vhd.bak
....................\.....................\...................\CLOCK_500.v
....................\.....................\...................\cnt.bsf
....................\.....................\...................\cnt.cmp
....................\.....................\...................\cnt.qip
....................\.....................\...................\cnt.vhd
....................\.....................\...................\cntm.v
....................\.....................\...................\comp.bsf
....................\.....................\...................\comp.v
....................\.

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