Description: Fixed-point multiplier FPGA simulation, hardware design for the study should help a friend
To Search:
- [FPGA_QPSK] - This document is based on the FPGA-QPSK
- [dct] - 2-D DCT-source, you can realize 8 x 8 da
- [bpsk] - FPGA-Based Digital Modulator BPSK, for p
- [8B10B] - VHDL-based dual-parity bit 8B10B coding
File list (Check if you may need any files):
基于FPGA的高速流水定点乘法器的设计.caj
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